DESIGN INFO:
============
This design instantiates the Zynq Processing system IP and connects it to the following other IP's:

- Ethernet
- UART
- GPIO IP (base address 0x40000000) (see Xilinx documentation from GPIO IP for information about how to use it)

    GPIO port is connected to the 4 LED's on the Florida GEN board
    GPIO2 port is connected (tri-state) to the PMOD#1 connector on the Florida:
        GPIO2[0 : 3]    -> PMOD X99 pin [1 : 4]
        GPIO2[4 : 7]    -> PMOD X99 pin [7 : 10]
        GPIO2[8 : 11]   -> PMOD X100 pin [1 : 4]
        GPIO2[12 : 15]  -> PMOD X100 pin [7 : 10]        

- SPI interface 2A
        SPI0 of the PS is connected to the PMOD#2 connector on the Florida GEN board,
        according to PMOD Interface Type 2A (Expanded SPI)
        Pin 1=SS, 2=MOSI, 3=MISO, 4=SCLK
        Pin 7=INT (input to EMIO 28)
        Pin 8=RESET (output EMIO 29)
        Pin 9=N/S   (output EMIO 30)
        Pin 10=N/S  (output EMIO 31)

- Pushbutton S3 -> GPIO EMIO (pin 964)
- Pushbutton S4 -> GPIO EMIO (pin 965)

- User led (on Miami) is blinking based on a 125Mhz clock comming from the Ethernet phy. 

Make sure to use Topic's BSP to create Linux images for the processing system (ARM). This because of clock settings and MIO configuration of the Zynq.
